Fundamentals of MOSFET

MOSFETs are also called Insulated Gate Field Effect Transistor (IGFET) and there are two kinds of them:

1. Enhanced MOSFET

2. Depletion MOSFET

The main principle behind a MOSFET is that when we apply an electric current in the insulated gate, which then converge on its semiconducting region. The conduction, resistance and biasing directions can therefore be controlled by doing so.

Figure 1: N-Channel MOSFET

1-ENHANCEMENT MOSFET

The figure above shows the schematic diagram of an n-Channel MOSFET and the two N+ regions that are highly doped has been diffused into the silicon substrate of a p-Channel that is lightly doped. One of the N+ regions is referred to as the Source (S) while the other N+ region is known as the Drain (D) and their distance of separation is only 1mil or 10³ inches thick. The substrate is insulated by a layer of Silicon Dioxide (SiO₂) and the design is littered with holes surrounding the oxide part of the MOSFET. This is done so that the device will allow current carriers to pass through the drain and the source simultaneously but it is controllable, hence the name semiconductor. Finally an aluminum coating is spread over the first layer which is the Silicon Dioxide and this metal aluminum layer then becomes the Gate (G) of the entire structure.

The insulating aluminum metal is layered in parallel to the Silicon Dioxide layer which then forms the parallel plate capacitor of the semiconductor channel. The complex construction of this device gave it its name Insulated Gate Field Effect Transistor (IGFET) and is the ideal semiconductor for industrial parts because it yields very high outputs for a MOSFET transistor.

How does it work?

OPERATION: If the substrate is grounded and a positive voltage is applied at the gate, the positive charge on G includes an equal negative charge on the substrate side between the source and the drain regions. Thus an electric field is produced between the source and the drain regions. The direction of the electric field is perpendicular to the plates of the capacitor through the oxides. The negative charge of the electron which are the minority carriers in the p-type substrate forms an inversion layer. As the positive voltage of the gate increments abruptly, the induced negative charge of the semiconductor also increases. Hence the conductivity increases and current flows from source to drain through the induced channel. Thus the drain current is enhanced by the positive gate voltage.

DEPLETION MOSFET:

Once again in the figure above is shown the n-Channel of the depletion MOSFET and the n-Channel is situated in the middle of the source and the drain regions of the MOSFET.

When Vgs=0 and if the drain (D) is biased positively relevant to the source (S), the majority carriers or electrons will flow through the n-Channel starting from the source (S) to the drain (D). We then have the current Id conventionally flowing through the drain-source channel. But when we reverse bias the gate voltage positive electrical charge or “holes” in the depletion region pass through the Silicon Dioxide of the parallel plate capacitor. By reverse biasing the gate voltage the free electrons get depleted in this region of the channel and now a depletion region is then created in the process. The thickness or thinness of the depletion region largely depends on the biasing of the Vgs and Vds. That is why the channel often appears to have a wedged shape to it. Id increases simultaneously when Vds is also increased and at some point will become constant with Vds in certain respects and when it does the resulting voltage is then labeled as pinch off voltage. Id goes off beat in reference to the pinch off voltage when this happens. In this scenario where the FET current becomes saturated with n-type electrons or the majority carriers, it thus becomes a less conductive channel because of the flow of positive charges, and when the Vgs is reversed biased Id drops as well. However, the depletion MOSFET can also be used as an enhancement MOSFET and vice versa. All we need to do is to apply positive voltage at the gate which in turn will induce the negative charges towards the n-type channel. Therefore Id will increase as the conductivity of the channel also increases.